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A Single Transistor Just Mimicked a Neuron at 10 Millikelvin. Quantum Computing’s Wiring Problem May Never Be the Same.

Researchers at the University of Hong Kong and Virginia Tech demonstrated that one silicon carbide transistor can spike like a biological neuron at the operating temperature of a superconducting quantum processor, consuming thousands of times less power than conventional cryogenic CMOS. Run the thermodynamic budget for a million-qubit machine, and you begin to see why this matters more than any qubit-count milestone this year.

Interior of a cryogenic dilution refrigerator with silicon carbide circuit traces glowing at near absolute zero
Tomás Reyes · Quantum & Physics ·

One hundred and sixty-eight cables.

That is what Google needed to connect 72 superconducting qubits to their room-temperature controllers in 2018: 168 individual coaxial lines threading through a dilution refrigerator the size of a large filing cabinet, carrying microwave pulses from electronics sitting at 300 kelvin down to a chip operating at 0.01 kelvin. For IBM’s 1,121-qubit Condor processor, unveiled in late 2023, the wiring swelled to over a mile of high-density cryogenic flex cables packed inside a custom-built “super-fridge.” Scale that wiring approach to the million-qubit machines that fault-tolerant quantum computing demands, and you are threading a physical impossibility through a tube cooled to colder than deep space.

Now a team at the University of Hong Kong and Virginia Tech has demonstrated something that could eventually rewrite this constraint. Published in Nature Communications in March 2026, their work shows that a single commercial silicon carbide (SiC) MOSFET can mimic the energy-efficient spiking behavior of a biological neuron at temperatures as low as 10 millikelvin. Not in a specialized fabrication lab. On an industry-standard transistor, the kind already rolling off 300-millimeter wafer lines for electric vehicles and power grids worldwide.

What They Actually Built

Professor Yuhao Zhang and Ph.D. student Xin Yang discovered that when you cool SiC MOSFETs below 2 kelvin, the devices exhibit a potent S-shaped negative differential resistance (NDR) driven by a mechanism called electron-donor impact ionization, or EDII. In plain terms, the transistor’s current-voltage curve develops a kink: push the voltage past a threshold and the current drops instead of rising, then snaps back up. That kink, intrinsic to the way nitrogen dopant atoms in SiC interact with the crystal lattice at cryogenic temperatures, is the raw ingredient for building oscillating circuits that fire in bursts, exactly as neurons do.

Using this NDR behavior, the team constructed three types of artificial neurons. A sensory neuron that converts analog input into discrete spikes. A logic neuron that performs Boolean operations through spike timing. And an integrate-and-fire neuron that accumulates charge until it crosses a threshold and fires, then resets, just like the standard computational model of a cortical neuron used across modern machine learning. On/off current ratios exceeded 107, and all three ran at 10 millikelvin.

“Because SiC is already used globally in electric vehicles and power grids, we can leverage existing industrial foundries to manufacture these cryogenic chips on 300-millimeter wafers,” Yang said in the university announcement.

The Thermodynamic Prison

To understand why spiking circuits at 10 millikelvin matter, you need to grasp the thermodynamic prison that every superconducting quantum computer lives inside.

A dilution refrigerator cools in stages, each constrained by a strict thermal budget. At the bottom sits the mixing chamber, typically around 10 to 20 millikelvin, where the quantum processor operates. Above it, successive plates hold components at progressively warmer temperatures: 100 millikelvin, 1 kelvin, 4 kelvin, and eventually room temperature at the top. A standard Bluefors LD450 laboratory system, the workhorse of the industry, provides 14 microwatts at 20 millikelvin and 450 microwatts at 100 millikelvin. Even Fermilab’s enormous Colossus platform, designed specifically for scaling, offers only about 300 microwatts at 20 millikelvin.

Now consider what conventional cryogenic control electronics draw. In 2024, Underwood et al. demonstrated a 14-nanometer FinFET cryo-CMOS chip at 4 kelvin that consumed 23 milliwatts per qubit. A more efficient 28-nanometer design by Bardin et al. brought that down to under 2 milliwatts per qubit. Both operate at 4 kelvin because they must. Place a 2-milliwatt chip at the mixing chamber, where only 14 microwatts of cooling power exists, and you have exceeded the entire thermal budget of the refrigerator by a factor of 143.

I ran the numbers to see what this means for scaling.

Metric Current Cryo-CMOS (best case) SiC Neuromorphic (assuming 1,000× efficiency gain)
Power per circuit element 2,000 µW (2 mW) ~2 µW
Elements at mixing chamber (14 µW budget) 0 7
Elements at mixing chamber (300 µW, Colossus) 0 150
Wires eliminated per element (if 10:1 multiplex) N/A 9 per controller
Wire reduction for 1,000 qubits (10:1 local control) 0 (all wires needed) ~2,700 fewer wires

At 2 microwatts per circuit element, a standard lab fridge could accommodate exactly seven SiC neuromorphic controllers at the mixing chamber. Not much. But the Colossus-class platform could fit 150. If each controller multiplexes signals for even 10 qubits locally, those 150 elements could handle 1,500 qubits while eliminating roughly 2,700 of the approximately 4,500 cables that would otherwise be required between temperature stages. That is a 60% wire reduction at the most thermally constrained boundary in the entire system.

For a million-qubit fault-tolerant machine, the arithmetic is starker. Current approaches would require millions of cables penetrating the cryostat. A 2026 review by Kawabata at Hosei University frames this bluntly: “As the number of physical qubits scales toward 105 to 106, simply multiplying this approach is no longer feasible.” Local processing at the mixing chamber is not merely desirable; it is a prerequisite for any machine that reaches that scale.

Why Silicon Carbide and Not Something Else

Other cryogenic computing approaches exist. Superconducting single-flux-quantum (SFQ) logic already operates at millikelvin temperatures and dissipates very little power, but it requires specialized fabrication and exotic materials. Intel’s Horse Ridge chip demonstrated cryo-CMOS control at around 3 kelvin, but standard silicon degrades rapidly below 1 kelvin as carrier freeze-out, threshold voltage shifts, and dopant ionization failures compound.

SiC sidesteps these problems because its wide bandgap (3.26 eV versus silicon’s 1.12 eV) and the specific physics of nitrogen donors in the 4H-SiC crystal polytype create the EDII effect rather than suffering from freeze-out. What destroys silicon at millikelvin temperatures is what enables SiC, and the material is not a laboratory curiosity. Wolfspeed, STMicroelectronics, Infineon, and Rohm collectively ship billions of dollars of SiC devices annually for EVs, solar inverters, and industrial power conversion, meaning foundry infrastructure already exists at 300-millimeter scale.

Beyond quantum computing, the team notes that SiC neuromorphic circuits could serve deep-space exploration, where electronics must survive the 40-kelvin surface of Europa or the 90-kelvin cold of the lunar night without the heaters that current silicon systems require.

Limitations

Several gaps separate this demonstration from a functioning quantum controller. First, the paper shows individual artificial neurons, not a complete qubit control or readout circuit. Building a full controller requires many neurons plus analog front-ends for microwave signal generation and measurement, and the total power consumption of such an integrated system remains unknown. Second, “thousands of times more energy-efficient” is a claim about the NDR spiking mechanism relative to conventional transistor switching at cryogenic temperatures, not a measured comparison between a SiC-based qubit controller and an existing cryo-CMOS controller performing the same function. Nobody has built the former yet. Third, SiC foundries are optimized for power MOSFETs and Schottky diodes, not the fine-pitch digital logic that qubit control demands. Adapting the process design kit for neuromorphic circuit density would require significant development. Fourth, the on/off ratio of 107 was measured on discrete transistors. Integration into multi-neuron networks will introduce parasitic effects, crosstalk, and signal integrity challenges that do not appear at the single-device level. Finally, this work was conducted by a single group at HKU and Virginia Tech. No independent replication has been published.

Strongest Counterargument

Time multiplexing may solve the wiring problem without any new materials at all. A 2026 study highlighted by the American Physical Society showed that sharing wires between qubits through time-division scheduling introduces less computational delay than theorists feared, because idle qubits can be addressed while active qubits are mid-computation. If multiplexing ratios of 10:1 or 100:1 prove achievable with existing electronic switches at the 4-kelvin stage, the entire thermodynamic argument for moving logic to the mixing chamber weakens considerably. IBM’s demonstrated success cramming a mile of cabling into a single Condor fridge suggests that pure engineering optimization still has room to run, and each cable technology generation from companies like Delft Circuits delivers incremental density improvements that compound over time.

Where this counterargument falters is in the physics of heat conduction. Every cable that penetrates from 4 kelvin to 10 millikelvin conducts heat down the temperature gradient regardless of how cleverly it is shared. Time multiplexing reduces the number of unique cables by the multiplexing ratio, but the surviving cables still conduct heat proportional to their combined cross-section and thermal conductivity. At a million qubits, even a 100:1 multiplexing ratio leaves 10,000 cables at the mixing chamber stage. Whether Colossus-scale cooling budgets can absorb the thermal load of 10,000 cables is an open engineering question that no published design has answered.

The Bottom Line

Quantum computing’s sexiest metric is qubit count: IBM hits 1,121, Google claimed quantum supremacy with 53, and startups race toward 1,000. But the actual constraint on building a useful quantum computer is not how many qubits you can fabricate on a chip. It is how many you can wire, control, and cool simultaneously inside a tube that offers 14 microwatts of thermal headroom at its coldest point.

What Zhang and Yang’s group demonstrated is not a quantum computer improvement. It is a proof that classical electronics can function at the same temperature as quantum processors, using a material the semiconductor industry already mass-produces. Every other cryogenic control approach operates at least 400 times warmer than the qubits and ships its signals down thousands of wires. A path to co-locating even crude local logic at 10 millikelvin changes the scaling equation from “more wires” to “smarter wiring.”

What you can do with this: If you work in quantum hardware, watch for follow-up papers from HKU and Virginia Tech demonstrating multi-neuron networks and specifically their total system power at millikelvin temperatures. A single-transistor demo is necessary but insufficient. If you are evaluating quantum computing stocks or SPACs, add “cryogenic control strategy” to your due diligence checklist, alongside qubit count and error rates. Companies planning to brute-force the wiring problem will hit a thermodynamic wall before they hit a million qubits. And if you are in SiC manufacturing, note that the fastest-growing end market for your wafers may not be electric vehicles in 10 years. It may be quantum infrastructure.